Date: Thursday, December 12, 2019
Time: 2:00 PM Eastern Standard Time
Sponsor: Mouser Electronics and Silicon Labs
Duration: 1 Hour
Summary:
Field Programmable Gate Array (FPGA) usage is becoming increasingly common in high performance applications such as networking, data centers, automotive, broadcast video, medical and print imaging and industrial controls. As performance of application increases, more reference clocks with high precision are needed by the FPGAs. Conventional timing solutions using multiple discrete crystals, simple clock generators and buffers can no longer meet the stringent jitter requirements of the end applications.
Silicon Labs broad portfolio of flexible, any-frequency clock generators utilize the patented MultiSynthTM technology to provide the most integrated timing solutions for Xilinx FPGAs without compromising performance. Designing a reference clock tree for a high performance Xilinx FPGA design is an exacting task and Silicon Labs broad timing portfolio offers flexible solutions to meet the most stringent jitter requirements for the end application.
Simplify Reference Clock Tree for Xilinx FPGAs
Speaker:
Linda Lua, Senior Product Manager, Silicon Lab
Linda Lua is the Silicon Labs product manager for datacenter timing products, managing the datacenter clock generators and clock buffers portfolio, new products definition, new product launches, and marketing promotions.
Prior to joining Silicon Labs, Ms. Lua was at ISSI, Inc., responsible for High Speed Memory products, and before that at IDT Inc., responsible for timing products business development and product management in networking and the communications market.
Ms. Lua holds a BS in Electrical Engineering from Iowa State University and MBA from the University of Texas at Dallas.
